高級(jí)IC驗(yàn)證工程師崗位職責(zé)
在社會(huì)發(fā)展不斷提速的今天，崗位職責(zé)的使用頻率呈上升趨勢，崗位職責(zé)包括崗位職務(wù)范圍、實(shí)現(xiàn)崗位目標(biāo)的責(zé)任、崗位環(huán)境、崗位任職資格及各個(gè)崗位之間的`相互關(guān)系等。那么相關(guān)的崗位職責(zé)到底是怎么制定的呢？下面是小編幫大家整理的高級(jí)IC驗(yàn)證工程師崗位職責(zé)，希望對(duì)大家有所幫助。
崗位職責(zé)
1.Develop test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's
2.Create verification environment for both directed and random verification
3.Create reusable bus functional models, monitors, checkers and scoreboards
4.Drive functional coverage driven verification closure
5.Work with architects, designers and post-silicon teams
任職條件
1.MS with 5+ or 3+ years of experience in design verification
2.Experience with RISC CPU (RISCV/MIPS/ARM) related IPs verification are highly desirable
3.Experience with USB/MIPI_CSI/MIPI_DSI or other high speed interface IPs verification are highly desirable
4.Experience with Deep Learning Accelerator related IPs verification are highly desirable
5.Excellent knowledge of popular EDA simulation tools (VCS or equivalent simulation tools, debug tools like Debussy, Simvision)
6.Experience in System Verilog or similar HVL is highly desirable
7.C++ programming language experience desirable
8.Scripting knowledge (Perl/shell)
9.Excellent communication skills and ability to lead highly competent team.
【高級(jí)IC驗(yàn)證工程師崗位職責(zé)】相關(guān)文章：
高級(jí)軟件工程師崗位職責(zé)06-19
高級(jí)系統(tǒng)運(yùn)維工程師的崗位職責(zé)10-10